Invention Grant
- Patent Title: Jitter-attenuated clock using a gapped clock reference
- Patent Title (中): 使用有间隙时钟参考的抖动衰减时钟
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Application No.: US13091052Application Date: 2011-04-20
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Publication No.: US08666011B1Publication Date: 2014-03-04
- Inventor: Viet Do , Simon Pang
- Applicant: Viet Do , Simon Pang
- Applicant Address: US CA Sunnyvale
- Assignee: Applied Micro Circuits Corporation
- Current Assignee: Applied Micro Circuits Corporation
- Current Assignee Address: US CA Sunnyvale
- Main IPC: H04L7/00
- IPC: H04L7/00

Abstract:
A system and method are provided for generating a jitter-attenuated clock using an asynchronous gapped clock source. The method accepts a first reference clock having a first frequency. Using the first reference clock, an asynchronous gapped clock is generated having an average second frequency less than the first frequency. A dynamic numerator (DN) and dynamic denominator (DD) are iteratively calculated for the gapped clock. Then, DN and DD are averaged. In response to the averaging, an averaged numerator (AN) and an averaged denominator (AD) are generated. Finally, the first frequency (first reference clock) is multiplied by the ratio of AN/AD to create a jitter-attenuated second clock having the second frequency.
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