Invention Grant
- Patent Title: Semiconductor device
- Patent Title (中): 半导体器件
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Application No.: US13552034Application Date: 2012-07-18
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Publication No.: US08664769B2Publication Date: 2014-03-04
- Inventor: Hiroshi Sunamura , Naoya Inoue , Kishou Kaneko
- Applicant: Hiroshi Sunamura , Naoya Inoue , Kishou Kaneko
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Young & Thompson
- Priority: JP2011-175391 20110810
- Main IPC: H01L23/52
- IPC: H01L23/52 ; H01L29/12

Abstract:
An element using a semiconductor layer is formed between wiring layers and, at the same time, a gate electrode is formed using a conductive material other than a material for wirings. A first wiring is embedded in a surface of a first wiring layer. A gate electrode is formed over the first wiring. The gate electrode is coupled to the first wiring. The gate electrode is formed by a process different from a process for the first wiring. Therefore, the gate electrode can be formed using a material other than a material for the first wiring. Further, a gate insulating film and a semiconductor layer are formed over the gate electrode.
Public/Granted literature
- US20130037795A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2013-02-14
Information query
IPC分类: