Invention Grant
US08664767B2 Conductive routings in integrated circuits using under bump metallization
有权
使用凹凸金属化的集成电路中的导电布线
- Patent Title: Conductive routings in integrated circuits using under bump metallization
- Patent Title (中): 使用凹凸金属化的集成电路中的导电布线
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Application No.: US13454968Application Date: 2012-04-24
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Publication No.: US08664767B2Publication Date: 2014-03-04
- Inventor: Ilija Jergovic , Efren M. Lacap
- Applicant: Ilija Jergovic , Efren M. Lacap
- Applicant Address: US CA Fremont
- Assignee: Volterra Semiconductor Corporation
- Current Assignee: Volterra Semiconductor Corporation
- Current Assignee Address: US CA Fremont
- Agency: Fish & Richardson P.C.
- Agent David J. Goren
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
An integrated circuit structure includes a first conductive layer and an under bump metallization layer over the first conductive layer. The first conductive layer has a first conductive region and a second conductive region electrically isolated from the first conductive region. The under bump metallization layer has a first conductive area and a second conductive area electrically isolated from the first conductive area, the first conductive area substantially located over the first conductive region and the second conductive area substantially located over the second conductive region. At least one of the first conductive area or the first conductive region includes a first protrusion extending toward the second conductive area or second conductive region, respectively. Conductive vias connect the first conductive region to the second conductive area and connect the second conductive region to the first conductive area, and the vias include at least one via connected to the first protrusion.
Public/Granted literature
- US20130037963A1 CONDUCTIVE ROUTINGS IN INTEGRATED CIRCUITS USING UNDER BUMP METALLIZATION Public/Granted day:2013-02-14
Information query
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