Invention Grant
- Patent Title: Semiconductor package having reliable electrical connection and assembling method
- Patent Title (中): 半导体封装具有可靠的电气连接和组装方法
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Application No.: US13569194Application Date: 2012-08-08
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Publication No.: US08664758B2Publication Date: 2014-03-04
- Inventor: Chih-Chen Lai
- Applicant: Chih-Chen Lai
- Applicant Address: TW New Taipei
- Assignee: Hon Hai Precision Industry Co., Ltd.
- Current Assignee: Hon Hai Precision Industry Co., Ltd.
- Current Assignee Address: TW New Taipei
- Agency: Altis Law Group, Inc.
- Priority: TW101119624 20120531
- Main IPC: H01L23/34
- IPC: H01L23/34 ; H01L21/00

Abstract:
A semiconductor package includes a printed circuit board, a chip, a protection frame, and a covering layer. The chip is mounted on the printed circuit board and is electrically connected to the printed circuit board through a number of first bonding wires. The protection frame includes a sidewall surrounding the chip and the bonding wires and defines a number of through holes passing through an inner surface and an outer surface of the sidewall. The protection frame is filled with adhesive. The adhesive adheres to the inner surface and covers the chip and the boding wires. The covering layer is coated on the outer surface and covers the through holes.
Public/Granted literature
- US20130320557A1 SEMICONDUCTOR PACKAGE HAVING RELIABLE ELECTRICAL CONNECTION AND ASSEMBLING METHOD Public/Granted day:2013-12-05
Information query
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