Invention Grant
- Patent Title: Manufacturing method of semiconductor device on cavities
- Patent Title (中): 半导体器件在腔体上的制造方法
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Application No.: US12053745Application Date: 2008-03-24
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Publication No.: US08664078B2Publication Date: 2014-03-04
- Inventor: Hidekazu Miyairi
- Applicant: Hidekazu Miyairi
- Applicant Address: JP
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP
- Agency: Husch Blackwell LLP
- Priority: JP2007-118086 20070427
- Main IPC: H01L21/76
- IPC: H01L21/76 ; H01L21/30 ; H01L21/46

Abstract:
An object is to provide a semiconductor device in which, through a simpler process, junction capacitance and power consumption can be reduced more than a conventional semiconductor device, and a manufacturing method thereof. An insulating film including an opening is formed over a base substrate and a part of a bond substrate is transferred to the base substrate, with the insulating film interposed therebetween, whereby a semiconductor film including a cavity between the semiconductor film and the base substrate is formed over the base substrate. Then, a semiconductor device including a semiconductor element such as a transistor is manufactured using the semiconductor film. The transistor includes a cavity between the base substrate and the semiconductor film used as an active layer. One cavity may be provided or a plurality of cavities may be provided.
Public/Granted literature
- US20080265323A1 Semiconductor Device and Manufacturing Method Thereof Public/Granted day:2008-10-30
Information query
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