Invention Grant
US08664076B2 Method of forming a robust, modular MIS (metal-insulator-semiconductor) capacitor with improved capacitance density
有权
形成稳定的模块化MIS（金属 - 绝缘体 - 半导体）电容器的方法，具有改善的电容密度
- Patent Title: Method of forming a robust, modular MIS (metal-insulator-semiconductor) capacitor with improved capacitance density
- Patent Title (中): 形成稳定的模块化MIS（金属 - 绝缘体 - 半导体）电容器的方法，具有改善的电容密度
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Application No.: US13239192Application Date: 2011-09-21
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Publication No.: US08664076B2Publication Date: 2014-03-04
- Inventor: Venkat Raghavan , Andrew Strachan
- Applicant: Venkat Raghavan , Andrew Strachan
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Eugene C. Conser; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H01L21/20
- IPC: H01L21/20
Abstract:
A method of forming a capacitor structure comprises: forming a doped polysilicon layer on an underlying dielectric layer; forming a dielectric stack on the doped polysilicon layer; forming a contact hole in the dielectric stack to expose a surface region of the doped polysilicon layer; forming a conductive contact plug that fills the contact hole and is in contact with the exposed surface of the doped polysilicon layer; forming a plurality of trenches in the dielectric stack such that each trench exposes a corresponding surface region of the doped polysilicon layer; forming a conductive bottom capacitor plate on exposed surfaces of the of the dielectric stack and on exposed surfaces of the doped polysilicon layer; forming a capacitor dielectric layer on the bottom capacitor plate; and forming a conductive top capacitor plate on the capacitor dielectric layer.
Public/Granted literature
- US20130069200A1 METHOD OF FORMING A ROBUST, MODULAR MIM CAPACITOR WITH IMPROVED CAPACITANCE DENSITY Public/Granted day:2013-03-21
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