Invention Grant
- Patent Title: Providing voltage isolation on a single semiconductor die
- Patent Title (中): 在单个半导体管芯上提供电压隔离
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Application No.: US13435179Application Date: 2012-03-30
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Publication No.: US08644365B2Publication Date: 2014-02-04
- Inventor: Zhiwei Dong
- Applicant: Zhiwei Dong
- Applicant Address: US TX Austin
- Assignee: Silicon Laboratories Inc.
- Current Assignee: Silicon Laboratories Inc.
- Current Assignee Address: US TX Austin
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: H04B1/38
- IPC: H04B1/38

Abstract:
In one embodiment, a method includes receiving an input signal in transmitter circuitry of a first semiconductor die and processing the input signal, sending the processed input signal to an isolation circuit of the die to generate a voltage isolated signal, and outputting the voltage isolated signal from the isolation circuit to a second semiconductor die coupled to the first semiconductor die via a bonding mechanism. Note that this second semiconductor die may not include isolation circuitry.
Public/Granted literature
- US20130257527A1 Providing Voltage Isolation On A Single Semiconductor Die Public/Granted day:2013-10-03
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