Invention Grant
US08644098B2 Dynamic random access memory address line test technique 有权
动态随机存取存储器地址线测试技术

  • Patent Title: Dynamic random access memory address line test technique
  • Patent Title (中): 动态随机存取存储器地址线测试技术
  • Application No.: US13135374
    Application Date: 2011-07-01
  • Publication No.: US08644098B2
    Publication Date: 2014-02-04
  • Inventor: Peiyuan LiuHenri Girard
  • Applicant: Peiyuan LiuHenri Girard
  • Agent Robert D. Shedd; Robert Levy
  • Main IPC: G11C7/00
  • IPC: G11C7/00 G11C29/00 G11C29/56
Dynamic random access memory address line test technique
Abstract:
Verification of the address connections of a memory (14) having multiplexed banks rows and columns commences by selecting a first address location having a bank/row/column value and then writing a pattern to a second location corresponding to the first location where one of the column, row, bank addresses could become stuck high or low. A second pattern gets written to the first location and a comparison occurs between the second pattern and first pattern written to the second location. If the data is the same, then that particular row/column/bank addresses is stuck.
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