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US08644062B2 Multi-level memory device using resistance material 有权
使用电阻材料的多级存储器件

Multi-level memory device using resistance material
Abstract:
A multi-level memory device includes an insulating layer having an opening therein, and a multi-level cell (MLC) formed in the opening that has a resistance level varies based on the data stored therein. The MLC is configured to have a resistance level that varies as write pulses having the same pulse height and different pulse widths are applied to the MLC.
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