Invention Grant
- Patent Title: High throughput semiconductor device testing
- Patent Title (中): 高通量半导体器件测试
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Application No.: US12882695Application Date: 2010-09-15
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Publication No.: US08527231B2Publication Date: 2013-09-03
- Inventor: Lawrence B. Luce
- Applicant: Lawrence B. Luce
- Applicant Address: US MA North Reading
- Assignee: Teradyne, Inc.
- Current Assignee: Teradyne, Inc.
- Current Assignee Address: US MA North Reading
- Agency: Wolf, Greenfield & Sacks, P.C.
- Main IPC: G01R29/00
- IPC: G01R29/00 ; G06F11/26 ; G06F17/40 ; G06F19/00

Abstract:
A test system that provides an output signal for analysis without requiring the test hardware to be idle during a settling interval. The test system includes a preprocessor that identifies the near-DC drift that occurs in the output signal and then adjusts the output signal to remove the near-DC drift. A set of values representing the near-DC drift at each of multiple times during the acquisition of a signal for analysis may be computed and used to model a settling profile of the signal by fitting a curve to the set of values. The model of the settling profile may then be subtracted from samples representing the output signal to provide an adjusted signal for further analysis.
Public/Granted literature
- US20120065906A1 HIGH THROUGHPUT SEMICONDUCTOR DEVICE TESTING Public/Granted day:2012-03-15
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