Invention Grant
US08527231B2 High throughput semiconductor device testing 有权
高通量半导体器件测试

High throughput semiconductor device testing
Abstract:
A test system that provides an output signal for analysis without requiring the test hardware to be idle during a settling interval. The test system includes a preprocessor that identifies the near-DC drift that occurs in the output signal and then adjusts the output signal to remove the near-DC drift. A set of values representing the near-DC drift at each of multiple times during the acquisition of a signal for analysis may be computed and used to model a settling profile of the signal by fitting a curve to the set of values. The model of the settling profile may then be subtracted from samples representing the output signal to provide an adjusted signal for further analysis.
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