Invention Grant
- Patent Title: Test apparatus and test method for A/D converter
- Patent Title (中): A / D转换器的测试仪器和测试方法
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Application No.: US13414611Application Date: 2012-03-07
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Publication No.: US08525714B2Publication Date: 2013-09-03
- Inventor: Koji Asami , Yasuo Furukawa
- Applicant: Koji Asami , Yasuo Furukawa
- Applicant Address: JP Tokyo
- Assignee: Advantest Corporation
- Current Assignee: Advantest Corporation
- Current Assignee Address: JP Tokyo
- Agency: Ladas & Parry, LLP
- Priority: JP2011-052805 20110310
- Main IPC: H03M1/06
- IPC: H03M1/06

Abstract:
A test apparatus configured to test an N-bit (N represents an integer) A/D converter is provided. A voltage generating unit outputs a 2N-valued analog voltage to the A/D converter. A capture unit captures an output code of the A/D converter for each level. A signal processing unit compares the output code captured for each level with the corresponding expected value code, corrects the value of the analog voltage for each level based upon the comparison result, and outputs the corrected analog voltage to the voltage generating unit.
Public/Granted literature
- US20120229314A1 TEST APPARATUS AND TEST METHOD FOR A/D CONVERTER Public/Granted day:2012-09-13
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