Invention Grant
- Patent Title: Semiconductor overlapped PN structure and manufacturing method thereof
- Patent Title (中): 半导体重叠PN结构及其制造方法
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Application No.: US13090449Application Date: 2011-04-20
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Publication No.: US08524586B2Publication Date: 2013-09-03
- Inventor: Tsung-Yi Huang , Chien-Hao Huang , Ying-Shiou Lin
- Applicant: Tsung-Yi Huang , Chien-Hao Huang , Ying-Shiou Lin
- Applicant Address: TW Hsin-Chu
- Assignee: Richtek Technology Corporation
- Current Assignee: Richtek Technology Corporation
- Current Assignee Address: TW Hsin-Chu
- Agency: Tung & Associates
- Main IPC: H01L21/334
- IPC: H01L21/334

Abstract:
The present invention discloses a semiconductor overlapped PN structure and manufacturing method thereof. The method includes: providing a substrate; providing a first mask to define a P (or N) type well and at least one overlapped region in the substrate; implanting P (or N) type impurities into the P (or N) type well and the at least one overlapped region; providing a second mask having at least one opening to define an N (or P) type well in the substrate, and to define at least one dual-implanted region in the at least one overlapped region; implanting N (or P) type impurities into the N (or P) type well and the at least one dual-implanted region such that the at least one dual-implanted region has P type and N type impurities.
Public/Granted literature
- US20120267767A1 SEMICONDUCTOR OVERLAPPED PN STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2012-10-25
Information query
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