A method of testing a semiconductor memory device includes reading previously written test data from the semiconductor memory device simultaneously through at least two data I/O connections, e.g., pins or pads, of the semiconductor memory device. The signals from the two data I/O connections are combined to produce a compound output signal. The compound output signal is received by a single I/O channel of a tester. The tester compares the compound output signal to a predetermined voltage level, and determines whether the semiconductor memory device is operating properly based on the comparison of the compound output signal to the predetermined voltage level.