A method for correcting a voltage offset influence of a pipelined analog to digital converter is disclosed, in which the method generates a first stage code and a first output voltage according to a first input voltage, generates a second stage code according to the first output voltage, generates a check code according to the first output voltage, determines a first correction code by referring to the first stage code and the check code, and corrects the first stage code with the first correction code when the first stage code is different from the first correction code.