Invention Grant
- Patent Title: Level shift circuit
- Patent Title (中): 电平移位电路
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Application No.: US13659307Application Date: 2012-10-24
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Publication No.: US08502592B2Publication Date: 2013-08-06
- Inventor: Masahiro Gion
- Applicant: Panasonic Corporation
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2010-254163 20101112
- Main IPC: H03L5/00
- IPC: H03L5/00

Abstract:
In a level shift circuit allows satisfactory operation with short delay time in the case of low-voltage setting of a low-voltage source, for example, when a state of an input signal IN transitions from a H (VDD) level to a L level, a node W2 precharged to a H (VDD3) level is discharged to ground (VSS) by a discharge circuit N2, and decreases in potential. The decrease in potential propagates to a latch circuit LA, and an output of the latch circuit LA propagates to an output circuit OC. Further, an inversion signal of the node W2 is input to the output circuit OC by bypassing the latch circuit LA. Thus, the output circuit OC starts operating prior to operation based on an output of the latch circuit LA.
Public/Granted literature
- US20130043926A1 LEVEL SHIFT CIRCUIT Public/Granted day:2013-02-21
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