Invention Grant
US08502362B2 Semiconductor package containing silicon-on-insulator die mounted in bump-on-leadframe manner to provide low thermal resistance
有权
包含绝缘体上硅芯片的半导体封装以引脚框架方式安装，以提供低热阻
- Patent Title: Semiconductor package containing silicon-on-insulator die mounted in bump-on-leadframe manner to provide low thermal resistance
- Patent Title (中): 包含绝缘体上硅芯片的半导体封装以引脚框架方式安装，以提供低热阻
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Application No.: US13210592Application Date: 2011-08-16
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Publication No.: US08502362B2Publication Date: 2013-08-06
- Inventor: Richard K. Williams
- Applicant: Richard K. Williams
- Applicant Address: US CA Santa Clara
- Assignee: Advanced Analogic Technologies, Incorporated
- Current Assignee: Advanced Analogic Technologies, Incorporated
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L23/34
Abstract:
Thermal transfer from a silicon-on-insulator (SOI) die is improved by mounting the die in a bump-on-leadframe manner in a semiconductor package, with solder or other metal bumps connecting the active layer of the SOI die to metal leads used to mount the package on a printed circuit board or other support structure.
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