Invention Grant
US08501549B2 Method of manufacturing a reverse blocking insulated gate bipolar transistor 有权
制造反向阻挡绝缘栅双极晶体管的方法

  • Patent Title: Method of manufacturing a reverse blocking insulated gate bipolar transistor
  • Patent Title (中): 制造反向阻挡绝缘栅双极晶体管的方法
  • Application No.: US13537549
    Application Date: 2012-06-29
  • Publication No.: US08501549B2
    Publication Date: 2013-08-06
  • Inventor: Masaaki Ogino
  • Applicant: Masaaki Ogino
  • Applicant Address: JP Kawasaki
  • Assignee: Fuji Electric Co., Ltd.
  • Current Assignee: Fuji Electric Co., Ltd.
  • Current Assignee Address: JP Kawasaki
  • Priority: JP2011-145492 20110630
  • Main IPC: H01L21/332
  • IPC: H01L21/332
Method of manufacturing a reverse blocking insulated gate bipolar transistor
Abstract:
A method of manufacturing a reverse blocking insulated gate bipolar transistor to form an isolation layer for bending and extending a pn junction, which exhibits a high reverse withstand voltage, to the front surface side. This ensures a high withstand voltage in the reversed direction and reduces leakage current in the reversely biased condition. Formation of a tapered groove by an anisotropic alkali etching process is conducted, resulting in a semiconductor substrate left with a thickness of at least 60 μm between one principal surface and the bottom surface of the tapered groove formed from the other principal surface.
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