Invention Grant
- Patent Title: Method of manufacturing a reverse blocking insulated gate bipolar transistor
- Patent Title (中): 制造反向阻挡绝缘栅双极晶体管的方法
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Application No.: US13537549Application Date: 2012-06-29
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Publication No.: US08501549B2Publication Date: 2013-08-06
- Inventor: Masaaki Ogino
- Applicant: Masaaki Ogino
- Applicant Address: JP Kawasaki
- Assignee: Fuji Electric Co., Ltd.
- Current Assignee: Fuji Electric Co., Ltd.
- Current Assignee Address: JP Kawasaki
- Priority: JP2011-145492 20110630
- Main IPC: H01L21/332
- IPC: H01L21/332

Abstract:
A method of manufacturing a reverse blocking insulated gate bipolar transistor to form an isolation layer for bending and extending a pn junction, which exhibits a high reverse withstand voltage, to the front surface side. This ensures a high withstand voltage in the reversed direction and reduces leakage current in the reversely biased condition. Formation of a tapered groove by an anisotropic alkali etching process is conducted, resulting in a semiconductor substrate left with a thickness of at least 60 μm between one principal surface and the bottom surface of the tapered groove formed from the other principal surface.
Public/Granted literature
- US20130005093A1 METHOD OF MANUFACTURING A REVERSE BLOCKING INSULATED GATE BIPOLAR TRANSISTOR Public/Granted day:2013-01-03
Information query
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