Invention Grant
- Patent Title: Efficient and self-balancing verification of multi-threaded microprocessors
- Patent Title (中): 多线程微处理器的高效和自平衡验证
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Application No.: US12169677Application Date: 2008-07-09
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Publication No.: US08479173B2Publication Date: 2013-07-02
- Inventor: Bryan G. Hickerson , John M. Ludden
- Applicant: Bryan G. Hickerson , John M. Ludden
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Francis Lammes; Stephen J. Walder, Jr.; Diana R. Gerhardt
- Main IPC: G06F9/44
- IPC: G06F9/44

Abstract:
Creating one or more irritator threads on one or more processor cores in a multi-threaded multiprocessor data processing system is provided. A test generator generates non-irritator thread code for execution by a non-irritator thread and irritator thread code for execution by one or more irritator threads of the multi-threaded multiprocessor data processing system. A simulation controller instantiates the non-irritator thread to execute the non-irritator thread code and the one or more irritator threads to execute the irritator thread code. The simulation controller determines if the non-irritator thread has finished execution of the entire instruction stream of the non-irritator thread code. Responsive to the non-irritator thread finishing execution of the entire instruction stream of the non-irritator thread code, the non-irritator thread performs an operation to terminate the execution of the irritator thread code by the one or more irritator threads.
Public/Granted literature
- US20100011345A1 Efficient and Self-Balancing Verification of Multi-Threaded Microprocessors Public/Granted day:2010-01-14
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