When switching a power supply rail for a processing circuit from a first voltage level to a second voltage level, power level detection circuitry detects when the supply voltage level reaches a predetermined voltage level. The power level detection circuitry comprises a first transistor and a second transistor which compete with one another such that the first transistor pulls a signal node voltage level at a signal node towards the supply voltage level while the second transistor pulls the signal node voltage level towards an external power supply voltage level. When the supply voltage level on the power supply rail reaches the predetermined voltage level, the first transistor overcomes the second transistor to trigger a ready signal indicating that the supply voltage level has reached the predetermined voltage level.