Circuits and methods are described for adaptive timing and communications. Described circuitry includes circuitry to receive an incoming data signal based on a receive clock signal, which is based on a local clock signal (LCS); an offset adjustment circuit to receive timing information relating the LCS to the incoming data signal and calculate a phase offset and a frequency offset indicative of adjustment(s) to be made to the LCS; a first phase interpolator to produce the receive clock signal by adjusting the LCS in response to the phase offset and the frequency offset; a clock recovery circuit to generate the timing information responsive to whether the receive clock signal leads or lags the incoming data signal; a second phase interpolator to produce a transmit clock signal by adjusting the LCS in response to the frequency offset; and circuitry to transmit an outgoing data signal based on the transmit clock signal.