A liquid crystal display panel includes a pixel array substrate, an opposite substrate, and a twisted nematic (TN) liquid crystal layer located between the two substrates. The pixel array substrate includes a first substrate, gate lines, data lines, thin film transistors (TFTs) coupled to the gate lines and the data lines, a first insulation layer, a transparent conductive layer, a second insulation layer, and pixel electrodes coupled to the TFTs through contact holes in the first and second insulation layers. The first insulation layer covers the gate lines, the data lines, and the TFTs. The transparent conductive layer, the second insulation layer, and the pixel electrodes are sequentially stacked on the first insulation layer and constitute a storage capacitor. A phase retardation value of the TN liquid crystal layer ranges from 250 to 480, and a dielectric anisotropy Δ∈ of the TN liquid crystal layer ranges from 3 to 10.