Invention Grant
- Patent Title: Method of manufacturing super-junction semiconductor device
- Patent Title (中): 超结半导体器件的制造方法
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Application No.: US13111481Application Date: 2011-05-19
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Publication No.: US08476134B2Publication Date: 2013-07-02
- Inventor: Takayuki Shimatou
- Applicant: Takayuki Shimatou
- Applicant Address: JP Kawasaki
- Assignee: Fuji Electric Co., Ltd.
- Current Assignee: Fuji Electric Co., Ltd.
- Current Assignee Address: JP Kawasaki
- Priority: JP2010-116561 20100520
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A method of manufacturing a super-junction semiconductor device includes growing an alternating conductivity type layer epitaxially on a heavily doped n-type semiconductor substrate, the alternating conductivity type layer including n-type and p-type semiconductor regions arranged alternately and repeated such that n-type and p-type regions are adjoining each other, and arranged to extend perpendicular to the substrate's major surface. The method includes forming a first trench having a predetermined depth in the surface portion of n-type semiconductor region; forming an n-type thin layer on the inner surface of the first trench; and burying gate electrode in the space surrounded by the n-type thin layer with a gate insulator film interposed between a gate electrode and the n-type thin layer.
Public/Granted literature
- US20110287598A1 METHOD OF MANUFACTURING SUPER-JUNCTION SEMICONDUCTOR DEVICE Public/Granted day:2011-11-24
Information query
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