Aspects of the invention relate to techniques for extracting impedance values associated with through-silicon vias in an integrated circuit system. A function fitting process is performed to generate parameters of a representation for magneto-quasi-static dyadic vector potential Green's functions at a plurality of frequencies of interest based on integrated circuit manufacturing process information. Based on the generated parameters, a set of electric current basis functions and the layout information for a layout design of interest, matrix elements of a matrix for each frequency in the plurality of frequencies of interest may be computed. The matrix is a part of a linear system that formulates a relationship of electric current and electric potential difference in various regions associated with the through-silicon vias in the layout design. Based on the matrix, impedance values associated with the through-silicon vias are computed.