Invention Grant
US08446781B1 Multi-rank partial width memory modules 有权
多级部分宽度内存模块

Multi-rank partial width memory modules
Abstract:
A system is provided for multi-rank, partial-width memory modules. A memory controller is provided. Additionally, a memory bus is provided. Further, a memory module with a plurality of ranks of memory circuits is provided, the memory module including a first number of data pins that is less than a second number of data pins of the memory bus.
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