Invention Grant
- Patent Title: Semiconductor device having a bus configuration which reduces electromigration
- Patent Title (中): 具有减少电迁移的总线结构的半导体器件
-
Application No.: US13224056Application Date: 2011-09-01
-
Publication No.: US08446005B2Publication Date: 2013-05-21
- Inventor: Tomoharu Yokouchi
- Applicant: Tomoharu Yokouchi
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2011-042785 20110228
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
A semiconductor device includes: a first transistor; a second transistor; an interlayer insulating film covering the transistors; a rectangular-shaped first bus formed on the interlayer insulating film and connected to first source/drain regions; a rectangular-shaped second bus formed on the interlayer insulating film with spacing from the first bus and connected to third source/drain regions; an inter-bus interconnect formed between the first and second buses for connecting these buses; a first contact pad provided on the first bus, to which a wire is connected; and a second contact pad provided on the second bus, to which a wire is connected. The inter-bus interconnect is in contact with part of the side of the first bus facing the second bus and part of the side of the second bus facing the first bus. The first and second contact pads are respectively in contact with part of the first and second buses.
Public/Granted literature
- US20120221759A1 SEMICONDUCTOR DEVICE Public/Granted day:2012-08-30
Information query
IPC分类: