知搜-全球专利检索

  1. Login
  2. Sign Up
Invention Grant
US08438437B2 Structures and control processes for efficient generation of different test clocking sequences, controls and other test signals in scan designs with multiple partitions, and devices, systems and processes of making 有权
用于在具有多个分区的扫描设计中有效地生成不同测试时钟序列，控制和其他测试信号的结构和控制过程，以及设备，系统和制造过程

Structures and control processes for efficient generation of different test clocking sequences, controls and other test signals in scan designs with multiple partitions, and devices, systems and processes of making
Abstract:
A scannable integrated circuit (100) including a functional integrated circuit (P1, P2) having scan chains, multiple scan decompressors (120.1, 120.2), each operable to supply scan bits to some of the scan chains (101.k, 102.k), a shared scan-programmable control circuit (110, 300), a tree circuit (400) coupled with the functional integrated circuit (P1, P2), the shared scan-programmable control circuit (110, 300) coupled to control the tree circuit (400), and a selective coupling circuit (180) operable to provide selective coupling with the shared scan-programmable control circuit (110, 300) for scan programming through any of the multiple scan decompressors (120.1, 120.2). Other circuits, devices, systems, and processes of operation and manufacture are disclosed.
Abstract(Chinese):

一种可扫描集成电路（100），包括具有扫描链的功能集成电路（P1，P2），多个扫描解压缩器（120.1,120.2），每个扫描解压缩器可操作以将扫描比特提供给扫描链中的某些扫描链（101.k， 共享扫描可编程控制电路（110,300），与所述功能集成电路（P1，P2）耦合的树电路（400），所述共享扫描可编程控制电路（110,300）被耦合以控制所述树 电路（400）和选择耦合电路（180），其可操作以提供与共享扫描可编程控制电路（110,300）的选择性耦合，用于通过任何多个扫描解压缩器（120.1,120.2）进行扫描编程。 公开了其他电路，设备，系统以及操作和制造过程。

Public/Granted literature
Information query
Espacenet
Patent Agency Ranking
0/0