A support element for verifying an array repair code solution includes a memory subsystem element including product data read from multichip modules utilized in a mainframe computing device, a wafer test repair algorithm, and a system test repair algorithm. The support element also includes a CPU emulator that causes the support element to perform an initial microcode load that includes a memory test, the memory test applying the wafer test repair algorithm to the product data to generate a wafer test repair solution and the system test repair algorithm to the product data to generate a system test repair solution and one or more repair rings for storing the wafer test repair solution and the system test repair solution.