Invention Grant
- Patent Title: Voltage level shift circuit and semiconductor device
- Patent Title (中): 电压电平移位电路和半导体器件
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Application No.: US13152737Application Date: 2011-06-03
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Publication No.: US08436655B2Publication Date: 2013-05-07
- Inventor: Kouhei Kurita , Kanji Oishi
- Applicant: Kouhei Kurita , Kanji Oishi
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: JP2010-129118 20100604
- Main IPC: H03K19/0175
- IPC: H03K19/0175
Abstract:
A voltage level shift circuit in which a difference in response characteristic depending on the signal level of an input signal is suppressed. The voltage level shift circuit generates an output signal VOUT having a voltage amplitude different from that of the input signal. An inverter INV2 generates a voltage V1 in the range of VSS to VDDI according to the input signal. An inverter INV3 generates a voltage V2 in the range of VSS to VPERI according to the input signal. An inverter INV4 generates the output signal VOUT according to V1 and V2.
Public/Granted literature
- US20110298493A1 VOLTAGE LEVEL SHIFT CIRCUIT AND SEMICONDUCTOR DEVICE Public/Granted day:2011-12-08
Information query
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