Invention Grant
US08436409B2 Semiconductor device 失效
半导体器件

Semiconductor device
Abstract:
In a semiconductor device of the invention, a semiconductor pillar configuring a vertical MOS transistor has an upper pillar having a first width and a lower pillar having a second width. A side surface of the upper pillar is covered with a second insulation film and a third insulation film and the lower pillar is covered with a first insulation film, which is a gate insulation film, from a side surface thereof to the second insulation film. A gate electrode is insulated from an upper conductive layer by the second and third insulation films.
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