Invention Grant
- Patent Title: Semiconductor device
- Patent Title (中): 半导体器件
-
Application No.: US13222543Application Date: 2011-08-31
-
Publication No.: US08436409B2Publication Date: 2013-05-07
- Inventor: Hiroyuki Fujimoto
- Applicant: Hiroyuki Fujimoto
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: Young & Thompson
- Priority: JP2010-194448 20100831
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H01L29/94

Abstract:
In a semiconductor device of the invention, a semiconductor pillar configuring a vertical MOS transistor has an upper pillar having a first width and a lower pillar having a second width. A side surface of the upper pillar is covered with a second insulation film and a third insulation film and the lower pillar is covered with a first insulation film, which is a gate insulation film, from a side surface thereof to the second insulation film. A gate electrode is insulated from an upper conductive layer by the second and third insulation films.
Public/Granted literature
- US20120049261A1 SEMICONDUCTOR DEVICE Public/Granted day:2012-03-01
Information query
IPC分类: