Method for forming a semiconductor device, and a semiconductor with an integrated poly-diode

Invention Grant

US08435853B2 Method for forming a semiconductor device, and a semiconductor with an integrated poly-diode 有权

Title translation: 用于形成半导体器件的方法和具有集成多极二极管的半导体

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Patent Title: Method for forming a semiconductor device, and a semiconductor with an integrated poly-diode
Patent Title (中): 用于形成半导体器件的方法和具有集成多极二极管的半导体
Application No.: US12871038

Application Date: 2010-08-30
Publication No.: US08435853B2

Publication Date: 2013-05-07
Inventor: Franz Hirler , Anton Mauder , Frank Pfirsch , Hans-Joachim Schulze
Applicant: Franz Hirler , Anton Mauder , Frank Pfirsch , Hans-Joachim Schulze
Applicant Address: AT Villach
Assignee: Infineon Technologies AG
Current Assignee: Infineon Technologies AG
Current Assignee Address: AT Villach
Agency: Murphy, Bilak & Homiller, PLLC
Main IPC: H01L21/8234
IPC: H01L21/8234

Method for forming a semiconductor device, and a semiconductor with an integrated poly-diode

Abstract:

A method for forming a field effect power semiconductor is provided. The method includes providing a semiconductor body, a conductive region arranged next to a main surface of the semiconductor body, and an insulating layer arranged on the main horizontal surface. A narrow trench is etched through the insulating layer to expose the conductive region. A polycrystalline semiconductor layer is deposited and a vertical poly-diode structure is formed. The polycrystalline semiconductor layer has a minimum vertical thickness of at least half of the maximum horizontal extension of the narrow trench. A polycrystalline region which forms at least a part of a vertical poly-diode structure is formed in the narrow trench by maskless back-etching of the polycrystalline semiconductor layer. Further, a semiconductor device with a trench poly-diode is provided.

Abstract(Chinese):

提供了一种用于形成场效应功率半导体的方法。该方法包括提供半导体本体，邻近半导体主体的主表面布置的导电区域和布置在主水平表面上的绝缘层。通过绝缘层蚀刻窄沟槽以暴露导电区域。沉积多晶半导体层并形成垂直多晶二极管结构。多晶半导体层的最小垂直厚度为窄沟槽的最大水平延伸的至少一半。通过多晶半导体层的无掩模背面蚀刻，在窄沟槽中形成形成垂直多晶二极管结构的至少一部分的多晶区域。此外，提供了具有沟槽多晶二极管的半导体器件。

Public/Granted literature

US20120049270A1 Method for Forming a Semiconductor Device, and a Semiconductor with an Integrated Poly-Diode Public/Granted day:2012-03-01

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺