Invention Grant
US08417913B2 Superpage coalescing which supports read/write access to a new virtual superpage mapping during copying of physical pages
失效
Superpage coalescing在复制物理页面期间支持对新的虚拟超级页面映射的读/写访问
- Patent Title: Superpage coalescing which supports read/write access to a new virtual superpage mapping during copying of physical pages
- Patent Title (中): Superpage coalescing在复制物理页面期间支持对新的虚拟超级页面映射的读/写访问
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Application No.: US10713733Application Date: 2003-11-13
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Publication No.: US08417913B2Publication Date: 2013-04-09
- Inventor: Elmootazbellah Nabil Elnozahy , James Lyle Peterson , Ramakrishnan Rajamony , Hazim Shafi
- Applicant: Elmootazbellah Nabil Elnozahy , James Lyle Peterson , Ramakrishnan Rajamony , Hazim Shafi
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Dwayne Nelson; Jack V. Musgrove
- Main IPC: G06F12/00
- IPC: G06F12/00

Abstract:
A method of assigning virtual memory to physical memory in a data processing system allocates a set of contiguous physical memory pages for a new page mapping, instructs the memory controller to move the virtual memory pages according to the new page mapping, and then allows access to the virtual memory pages using the new page mapping while the memory controller is still copying the virtual memory pages to the set of physical memory pages. The memory controller can use a mapping table which temporarily stores entries of the old and new page addresses, and releases the entries as copying for each entry is completed. The translation lookaside buffer (TLB) entries in the processor cores are updated for the new page addresses prior to completion of copying of the memory pages by the memory controller. The invention can be extended to non-uniform memory array (NUMA) systems. For systems with cache memory, any cache entry which is affected by the page move can be updated by modifying its address tag according to the new page mapping. This tag modification may be limited to cache entries in a dirty coherency state. The cache can further relocate a cache entry based on a changed congruence class for any modified address tag.
Public/Granted literature
- US20050108496A1 Hardware support for superpage coalescing Public/Granted day:2005-05-19
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