Invention Grant
US08417864B2 Cascade-able serial bus device with clock and management and cascade methods using the same 有权
具有时钟和管理级联串行总线设备的串级总线设备

Cascade-able serial bus device with clock and management and cascade methods using the same
Abstract:
A cascade-able serial bus device for coupling between a host device and another serial bus device is disclosed. The host device includes a serial bus interface. The serial bus device includes a first connection interface, a second connection interface and a bypassing module. The first connection interface is coupled to the serial bus interface of the host device. The second connection interface is coupled to the second serial bus device. The bypassing module is coupled to a chip select (CS) signal line of the serial bus interface and the second connection interface for selectively bypassing or non-bypassing the CS signal to the second serial bus device.
Information query
Patent Agency Ranking
0/0