Invention Grant
US08416907B2 Method and apparatus for integral state initialization and quality of lock monitoring in a clock and data recovery system
有权
用于整体状态初始化的方法和装置以及时钟和数据恢复系统中锁定监视的质量
- Patent Title: Method and apparatus for integral state initialization and quality of lock monitoring in a clock and data recovery system
- Patent Title (中): 用于整体状态初始化的方法和装置以及时钟和数据恢复系统中锁定监视的质量
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Application No.: US12846390Application Date: 2010-07-29
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Publication No.: US08416907B2Publication Date: 2013-04-09
- Inventor: Pervez M. Aziz , Gregory W. Sheets , Vladimir Sindalovsky
- Applicant: Pervez M. Aziz , Gregory W. Sheets , Vladimir Sindalovsky
- Applicant Address: US PA Allentown
- Assignee: Agere Systems LLC
- Current Assignee: Agere Systems LLC
- Current Assignee Address: US PA Allentown
- Agency: Ryan, Mason & Lewis, LLP
- Main IPC: H04L7/00
- IPC: H04L7/00 ; H04L25/00 ; H04L25/40

Abstract:
Methods and apparatus are provided for improving the performance of second order CDR systems. The integral state of the CDR system is initialized to a value that is based on an expected frequency profile that may be known a priori for certain applications. One or more quality of lock (QOL) metrics are also monitored that are derived from the integral register state value. A quality of a locking between a received signal and a local clock generated by a Clock and Data Recovery (CDR) system is evaluated by monitoring a state value of an integral register in a digital loop filter of the CDR system; evaluating one or more predefined criteria based on the integral register state value; and identifying a poor lock condition if the one or more predefined criteria are not satisfied.
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