Invention Grant
- Patent Title: Microcomputer system
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Application No.: US12667854Application Date: 2008-07-01
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Publication No.: US08415836B2Publication Date: 2013-04-09
- Inventor: Atsushi Sakuragi , Hiroshi Hayaoka , Takayuki Takeuchi
- Applicant: Atsushi Sakuragi , Hiroshi Hayaoka , Takayuki Takeuchi
- Applicant Address: JP Kawasaki-Shi
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-Shi
- Agency: McDermott Will & Emery LLP
- Priority: JP2007-212224 20070816
- International Application: PCT/JP2008/061900 WO 20080701
- International Announcement: WO2009/022501 WO 20090219
- Main IPC: H01H31/10
- IPC: H01H31/10 ; H01H33/52 ; H01H33/59 ; H01H47/00 ; H01H85/46 ; H01H19/14

Abstract:
It is an object of the present invention to provide a technology that a microcomputer is capable of detecting the states of a large number of switches with a small number of ports. In a microcomputer system according to the present invention, any one of (2N−1) kinds of the combination patterns with respect to the combination of N input ports (IP1 to IP4) of a microcomputer (1) is allocated to each of M push-down switches (SW12, SW13, SW14, SW23, SW24, and SW34) with the different combination from each push-down switch. Each push-down switch inverts the input levels of the input ports in the combination pattern allocated thereto when pushed down. The microcomputer (1) detects the state of each push-down switch on the basis of the input levels of the N input ports.
Public/Granted literature
- US20100327662A1 MICROCOMPUTER SYSTEM Public/Granted day:2010-12-30
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