Invention Grant
- Patent Title: Performing scenario reduction
- Patent Title (中): 执行场景减少
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Application No.: US12795592Application Date: 2010-06-07
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Publication No.: US08413099B2Publication Date: 2013-04-02
- Inventor: Amir H. Mottaez , Rajinish K. Prasad
- Applicant: Amir H. Mottaez , Rajinish K. Prasad
- Applicant Address: US CA Mountain View
- Assignee: Synopsys, Inc.
- Current Assignee: Synopsys, Inc.
- Current Assignee Address: US CA Mountain View
- Agency: Park, Vaughan, Fleming & Dowler LLP
- Agent Laxman Sahasrabuddhe
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
Some embodiments of the present invention provide techniques and systems for reducing the number of scenarios over which a circuit design is optimized. Each scenario in the set of scenarios can be associated with a process corner, an operating condition, and/or an operating mode. During operation, the system can receive a set of scenarios over which the circuit design is to be optimized. Next, the system can compute values of constrained objects in the circuit design over the set of scenarios. The system can then determine a subset of scenarios based at least on the values of the constrained objects, so that if the circuit design meets design constraints in each scenario in the subset of scenarios, the circuit design is expected to meet the design constraints in each scenario in the set of scenarios.
Public/Granted literature
- US20110302546A1 METHOD AND APPARATUS FOR PERFORMING SCENARIO REDUCTION Public/Granted day:2011-12-08
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