Invention Grant
US08413036B2 Pseudorandom binary sequence checker with control circuitry for end-of-test check 有权
具有用于测试结束检查的控制电路的伪随机二进制序列检查器

Pseudorandom binary sequence checker with control circuitry for end-of-test check
Abstract:
Control circuitry is coupled between an error event output and a data input of a pseudorandom binary sequence (PRBS) checker. The control circuitry is configured to switch between a first operating state in which a received PRBS signal is applied to the data input of the PRBS checker and a second operating state in which an error signal is applied to the data input of the PRBS checker, responsive to detection of a designated condition of the PRBS checker. In an illustrative embodiment, the designated condition is an end-of-test condition indicating that the PRBS checker has completed a test involving the received PRBS signal.
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