Invention Grant
- Patent Title: Memory device with boost compensation
- Patent Title (中): 带升压补偿的存储器件
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Application No.: US12981031Application Date: 2010-12-29
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Publication No.: US08411518B2Publication Date: 2013-04-02
- Inventor: Dhori Kedar Janardan , Rakesh Kumar Sinha , Sachin Gulyani
- Applicant: Dhori Kedar Janardan , Rakesh Kumar Sinha , Sachin Gulyani
- Applicant Address: IN Greater Noida
- Assignee: STMicroelectronics Pvt. Ltd.
- Current Assignee: STMicroelectronics Pvt. Ltd.
- Current Assignee Address: IN Greater Noida
- Agency: Gardere Wynne Sewell LLP
- Main IPC: G11C7/00
- IPC: G11C7/00

Abstract:
A memory circuit includes a memory cell configured to be re-writable. A write enable circuit is configured to enable writing a signal via a pair of bit lines to the memory cell depending on a write signal. A charge supply circuit is configured to supply a charge to at least one of the pair of bit lines. A charge supply controller is configured to control the charge supply circuit to supply the charge dependent on at least one of the temperature of the memory circuit and the potential difference supply of the memory circuit.
Public/Granted literature
- US20120170391A1 MEMORY DEVICE WITH BOOST COMPENSATION Public/Granted day:2012-07-05
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