Invention Grant
- Patent Title: Input/output circuit
- Patent Title (中): 输入/输出电路
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Application No.: US13238664Application Date: 2011-09-21
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Publication No.: US08410841B2Publication Date: 2013-04-02
- Inventor: Susumu Yamada
- Applicant: Susumu Yamada
- Applicant Address: US AZ Phoenix
- Assignee: Semiconductor Components Industries, LLC.
- Current Assignee: Semiconductor Components Industries, LLC.
- Current Assignee Address: US AZ Phoenix
- Agency: Westerman, Hattori, Daniels & Adrian, LLP
- Priority: JP2009-224992 20090929
- Main IPC: H03K17/687
- IPC: H03K17/687 ; H03K17/00

Abstract:
In some embodiments, an input/output (I/O) circuit sends and receives a high-level signal and a low-level signal via a coupling capacitance provided on a communication line. The I/O circuit includes a receiving portion including a first detection circuit arranged to detect one of the signals and a second detection circuit arranged to detect the other signal, a transmitting portion including a three-value output circuit configured to output one of signals consisting of a high-level signal, a low-level signal, and a high impedance signal, and a control circuit configured to control the receiving portion and the transmitting portion. The control circuit judges a level of an inputted signal depending on detection results of the first detection circuit and the second detection circuit in a receiving state and controls an output value of the three-value output circuit in a transmitting state.
Public/Granted literature
- US20120007655A1 INPUT/OUTPUT CIRCUIT Public/Granted day:2012-01-12
Information query
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