Invention Grant
US08407515B2 Partition transparent memory error handling in a logically partitioned computer system with mirrored memory
有权
在具有镜像内存的逻辑分区计算机系统中分区透明内存错误处理
- Patent Title: Partition transparent memory error handling in a logically partitioned computer system with mirrored memory
- Patent Title (中): 在具有镜像内存的逻辑分区计算机系统中分区透明内存错误处理
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Application No.: US12115625Application Date: 2008-05-06
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Publication No.: US08407515B2Publication Date: 2013-03-26
- Inventor: Peter Joseph Heyrman , Naresh Nayar , Gary Ross Ricard
- Applicant: Peter Joseph Heyrman , Naresh Nayar , Gary Ross Ricard
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Martin & Associates, LLC
- Agent Bret J. Petersen
- Main IPC: G06F11/00
- IPC: G06F11/00

Abstract:
A method and apparatus for transparently handling recurring correctable errors and uncorrectable errors in a mirrored memory system prevents costly system shutdowns for correctable memory errors or system failures from uncorrectable memory errors. When a high number of correctable errors are detected for a given memory location, a memory relocation mechanism in the hypervisor moves the data associated with the memory location to an alternate physical memory location transparently to the partition such that the partition has no knowledge that the physical memory actualizing the memory location has been changed. When a correctable error occurs, the memory relocation mechanism uses data from a partner mirrored memory block as a data source for the memory block with the uncorrectable error and then relocates the data to a newly allocated memory block to replace the memory block with the uncorrectable error.
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