A synchronization signal control circuit according to embodiments includes a phase difference detecting section and a vertical synchronization correction control section. When a vertical synchronization period of an input video signal is within a compensation period range between a minimum vertical synchronization period and a maximum vertical synchronization period, the synchronization signal control circuit outputs a display vertical synchronization signal used for displaying the input video signal to a display section capable of providing a display based on the input video signal. The phase difference detecting section detects a phase difference between an input vertical synchronization signal based on the input video signal and the display vertical synchronization signal. The vertical synchronization correction control section corrects the cycle period of the display vertical synchronization signal within the compensation period range so as to reduce the phase difference.