An arrangement comprising: at least one power semiconductor module and a transport packaging. The power semiconductor module has a base element, a housing and connection elements. The transport packaging has a cover layer, an interlayer with a respective cutout assigned to the power semiconductor module, and a cover film. The cover layer is generally planar, and has a first main surface facing the power semiconductor module. The interlayer is arranged on the first main surface of the cover layer. The power semiconductor module is arranged in the cutout, on the first main surface of the cover layer, wherein the base element of the power semiconductor module is disposed on the first main surface of the cover layer. The cover film bears on and covers substantial parts of the housing of the power semiconductor module. The cover film is connected to the first main surface of the interlayer.