Invention Grant
- Patent Title: Semiconductor device structures
- Patent Title (中): 半导体器件结构
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Application No.: US13590991Application Date: 2012-08-21
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Publication No.: US08405191B2Publication Date: 2013-03-26
- Inventor: Mark E. Tuttle
- Applicant: Mark E. Tuttle
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: H01L29/40
- IPC: H01L29/40

Abstract:
The present invention relates to methods for forming through-wafer interconnects in semiconductor substrates and the resulting structures. In one embodiment, a method for forming a through-wafer interconnect includes providing a substrate having a pad on a surface thereof, depositing a passivation layer over the pad and the surface of the substrate, and forming an aperture through the passivation layer and the pad using a substantially continuous process. An insulative layer is deposited in the aperture followed by a conductive layer and a conductive fill. In another embodiment of the invention, a semiconductor device is formed including a first interconnect structure that extends through a conductive pad and is electrically coupled with the conductive pad while a second interconnect structure is formed through another conductive pad while being electrically isolated therefrom. Semiconductor devices and assemblies produced with the methods are also disclosed.
Public/Granted literature
- US20120313248A1 SEMICONDUCTOR DEVICE STRUCTURES Public/Granted day:2012-12-13
Information query
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