Invention Grant
US08405135B2 3D via capacitor with a floating conductive plate for improved reliability
有权
3D通过具有浮动导电板的电容器,以提高可靠性
- Patent Title: 3D via capacitor with a floating conductive plate for improved reliability
- Patent Title (中): 3D通过具有浮动导电板的电容器,以提高可靠性
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Application No.: US12898340Application Date: 2010-10-05
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Publication No.: US08405135B2Publication Date: 2013-03-26
- Inventor: Chih-Chao Yang , Fen Chen , Baozhen Li
- Applicant: Chih-Chao Yang , Fen Chen , Baozhen Li
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Wenjie Li; Parashos Kalaitzis
- Main IPC: H01L27/108
- IPC: H01L27/108

Abstract:
The present invention provides a 3D via capacitor and a method for forming the same. The capacitor includes an insulating layer on a substrate. The insulating layer has a via having sidewalls and a bottom. A first electrode overlies the sidewalls and at least a portion of the bottom of the via. A first high-k dielectric material layer overlies the first electrode. A first conductive plate is over the first high-k dielectric material layer. A second high-k dielectric material layer overlies the first conductive plate and leaves a remaining portion of the via unfilled. A second electrode is formed in the remaining portion of the via. The first conductive plate is substantially parallel to the first electrode and is not in contact with the first and second electrodes. An array of such 3D via capacitors is also provided.
Public/Granted literature
- US20120080771A1 3D VIA CAPACITOR WITH A FLOATING CONDUCTIVE PLATE FOR IMPROVED RELIABILITY Public/Granted day:2012-04-05
Information query
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