Invention Grant
US08405132B2 Self-aligned selective metal contact to source/drain diffusion region
有权
自对准选择性金属接触源极/漏极扩散区域
- Patent Title: Self-aligned selective metal contact to source/drain diffusion region
- Patent Title (中): 自对准选择性金属接触源极/漏极扩散区域
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Application No.: US12910735Application Date: 2010-10-22
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Publication No.: US08405132B2Publication Date: 2013-03-26
- Inventor: Peter Chang
- Applicant: Peter Chang
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: H01L29/78
- IPC: H01L29/78

Abstract:
A transistor structure includes a semiconductor substrate with a first surface, a diffusion region at the first surface of the substrate, a sacrificial gate formed on the diffusion region, and insulating side walls formed adjacent to the sacrificial gate. A metal gate is formed by etching out the sacrificial gate and filling in the space between the insulating side walls with gate metals. Silicided source and drain contacts are formed over the diffusion region between the side walls of two adjacent aluminum gates. One or more oxide layers are formed over the substrate. Vias are formed in the oxide layers by plasma etching to expose the silicided source and drain contacts, which simultaneously oxidizes the aluminum gate metal. A first metal is selectively formed over the silicided contact by electroless deposition, but does not deposit on the oxidized aluminum gate.
Public/Granted literature
- US20110037105A1 SELF-ALIGNED SELECTIVE METAL CONTACT TO SOURCE/DRAIN DIFFUSION REGION Public/Granted day:2011-02-17
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