A tester for testing a device under test has a first channel unit and a second channel unit. The first channel unit has a corresponding first pin connection for a signal from a device under test, a corresponding first test processor adapted to process, at least partially, data obtained from the first pin connection, and a corresponding first memory coupled with the first test processor and adapted to store data provided by the first test processor. The first channel unit is adapted to transfer at least a part of the data obtained from the first pin connection to the second channel unit as transfer data. The second channel unit has a corresponding second test processor adapted to process, at least partly, the transfer data from the first channel unit.