Invention Grant
US08401019B2 Method, integrated circuit, and communication unit for scheduling a processing of packet stream channels 有权
方法,集成电路和通信单元,用于调度分组流信道的处理

  • Patent Title: Method, integrated circuit, and communication unit for scheduling a processing of packet stream channels
  • Patent Title (中): 方法,集成电路和通信单元,用于调度分组流信道的处理
  • Application No.: US12738421
    Application Date: 2007-10-23
  • Publication No.: US08401019B2
    Publication Date: 2013-03-19
  • Inventor: Florin-Laurentiu Stoica
  • Applicant: Florin-Laurentiu Stoica
  • Applicant Address: US TX Austin
  • Assignee: Freescale Semiconductor, Inc.
  • Current Assignee: Freescale Semiconductor, Inc.
  • Current Assignee Address: US TX Austin
  • International Application: PCT/IB2007/054302 WO 20071023
  • International Announcement: WO2009/053774 WO 20090430
  • Main IPC: H04W4/00
  • IPC: H04W4/00 H04L12/28 H04L12/56
Method, integrated circuit, and communication unit for scheduling a processing of packet stream channels
Abstract:
A method for scheduling a processing of packet stream channels comprises: determining whether at least one packet stream channel comprises a frame ready for processing; if at least one packet stream channel comprises a frame ready for processing, identifying a frame ready for processing having a highest priority; and scheduling the identified highest priority frame for processing. The method further comprises prioritising frames ready for processing based on at least one of: a frame availability time and an estimated processing time, for each frame.
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