An integrated circuit (IC) is disclosed. The IC includes a first global voltage node and a second global voltage node. The IC further includes two or more power domains each coupled to the first global voltage node. Each of the two or more power domains includes a functional unit and a local voltage node coupled to the functional unit. Each of the plurality of power domains further includes a power-gating transistor coupled between the local voltage node and the second global voltage node, and an ESD (electrostatic discharge) circuit configured to detect an occurrence of an ESD event and further configured to cause activation of the transistor responsive to detecting the ESD event.