Invention Grant
- Patent Title: Methods of fabricating semiconductor devices including multilayer dielectric layers
- Patent Title (中): 制造包括多层电介质层的半导体器件的方法
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Application No.: US13019636Application Date: 2011-02-02
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Publication No.: US08399364B2Publication Date: 2013-03-19
- Inventor: Kil-chul Kim , Jong-cheol Lee , Ki-vin Im , Jae-hyun Yeo
- Applicant: Kil-chul Kim , Jong-cheol Lee , Ki-vin Im , Jae-hyun Yeo
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel Sibley & Sajovec
- Priority: KR10-2010-0023405 20100316
- Main IPC: H01L21/471
- IPC: H01L21/471

Abstract:
Methods of manufacturing semiconductor devices including multilayer dielectric layers are disclosed. The methods include forming a multilayer dielectric layer including metal atoms and silicon atoms on a semiconductor substrate. The multilayer dielectric layer includes at least two crystalline metal silicate layers having different silicon concentrations. The multilayer dielectric layer may be used, for example, as a dielectric layer for a capacitor, or as a blocking layer for a nonvolatile memory device.
Public/Granted literature
- US20110230056A1 METHODS OF FABRICATING SEMICONDUCTOR DEVICES INCLUDING MULTILAYER DIELECTRIC LAYERS Public/Granted day:2011-09-22
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