Invention Grant
US08399314B2 p-FET with a strained nanowire channel and embedded SiGe source and drain stressors 有权
具有应变纳米线通道和嵌入式SiGe源极和漏极应力的p-FET

p-FET with a strained nanowire channel and embedded SiGe source and drain stressors
Abstract:
Techniques for embedding silicon germanium (e-SiGe) source and drain stressors in nanoscale channel-based field effect transistors (FETs) are provided. In one aspect, a method of fabricating a FET includes the following steps. A doped substrate having a dielectric thereon is provided. At least one silicon (Si) nanowire is placed on the dielectric. One or more portions of the nanowire are masked off leaving other portions of the nanowire exposed. Epitaxial germanium (Ge) is grown on the exposed portions of the nanowire. The epitaxial Ge is interdiffused with Si in the nanowire to form SiGe regions embedded in the nanowire that introduce compressive strain in the nanowire. The doped substrate serves as a gate of the FET, the masked off portions of the nanowire serve as channels of the FET and the embedded SiGe regions serve as source and drain regions of the FET.
Information query
IPC分类:
H 电学
H01 基本电气元件
H01L 半导体器件;其他类目中不包括的电固体器件(使用半导体器件的测量入G01;一般电阻器入H01C;磁体、电感器、变压器入H01F;一般电容器入H01G;电解型器件入H01G9/00;电池组、蓄电池入H01M;波导管、谐振器或波导型线路入H01P;线路连接器、汇流器入H01R;受激发射器件入H01S;机电谐振器入H03H;扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R;一般电光源入H05B;印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K;在具有特殊应用的电路中使用的半导体器件见应用相关的小类)
H01L29/00 专门适用于整流、放大、振荡或切换,并具有至少一个电位跃变势垒或表面势垒的半导体器件;具有至少一个电位跃变势垒或表面势垒,例如PN结耗尽层或载流子集结层的电容器或电阻器;半导体本体或其电极的零部件(H01L31/00至H01L47/00,H01L51/05优先;除半导体或其电极之外的零部件入H01L23/00;由在一个共用衬底内或其上形成的多个固态组件组成的器件入H01L27/00)
H01L29/02 .按其半导体本体的特征区分的
H01L29/12 ..按其构成材料的特征区分的
H01L29/26 ...除掺杂材料或其他杂质外,包括有包含在H01L29/16,H01L29/18,H01L29/20,H01L29/22,H01L29/24各组中两组或更多个组内的元素的
H01L29/267 ....在不同半导体区域中的
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