Invention Grant
- Patent Title: Method and system for model-based routing of an integrated circuit
- Patent Title (中): 集成电路基于模型路由的方法和系统
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Application No.: US12979064Application Date: 2010-12-27
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Publication No.: US08392864B2Publication Date: 2013-03-05
- Inventor: David White , Eric Nequist
- Applicant: David White , Eric Nequist
- Applicant Address: US CA San Jose
- Assignee: Cadence Design Systems, Inc.
- Current Assignee: Cadence Design Systems, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Vista IP Law Group, LLP
- Main IPC: G06F17/50
- IPC: G06F17/50
Abstract:
Disclosed is a method, system, and computer program product for implementing model-based floorplanning, layout, placement, and routing. Models are used to guide the placement and routing of polygons on the IC layout based upon predictions of manufacturing variations.
Public/Granted literature
- US20110093826A1 METHOD AND SYSTEM FOR MODEL-BASED ROUTING OF AN INTEGRATED CIRCUIT Public/Granted day:2011-04-21
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